CMOS Sensor Sequences Designing of High-Speed Image Acquisition System Based on FPGA

High-speed image acquisition technology can be used in lots of industrial or scientific occasions to analysis dynamic process of experiments or tests. This paper proposed a low-cost multi-occasion high-speed image acquisition system. Based on completed hardware platform, we chose VHDL to complete the software design. Aimed at the sequences designing of CMOS sensor, the way of using counters to create sequences with VHDL has been chosen and it is more suitable for VHDL to describe the sequence with strict timing relationship. And then the programs has been simulated and synthesized, the results indicates that the course of design, simulation and verification is reasonable and efficient.