A VLSI chip for isolated speech recognition system

A VLSI processor is designed for the small-scale isolated speech recognition applications. It is a dedicated processor which detects endpoint, extracts LPC (linear predictive coefficient) cepstral coefficients from the speech signal, and computes the spectral distances using a dynamic time warping (DTW) technique. The designed chip can recognize 1000 isolated words per second with an average recognition accuracy of 90.3%. It is designed in a 0.8 /spl mu/m CMOS technology, includes 66,760 gates, and runs with a 10 MHz clock.