A very small bipolar transistor technology with sidewall polycide base electrode for ECL-CMOS LSIs

Very small, high-performance, silicon bipolar transistors (SPOTEC) are developed for use in ECL-CMOS LSIs. The transistors are fabricated with a sidewall polycide base; chemical vapor deposition is used to selectively deposit tungsten on the sidewall surface of the polysilicon base. The tungsten is then silicided. This self-aligned polycide technology makes a narrow (0.4-/spl mu/m wide), low-resistance (7 /spl Omega///spl square/) base electrode possible. Narrow U-groove isolation and narrow collector metallization techniques are used to reduce the transistor area to 10 /spl mu/m/sup 2/. A shallow E-B junction and base layer have now been formed by using rapid-vapor-phase doping. The resulting transistors have good I-V characteristics without leakage current or high current gain. They have a high cut-off frequency of 37 GHz (53 GHz with pedestal collector ion implantation and thin epitaxial layer) and small junction capacitances. These transistors facilitate the development of very-high-speed, high-density ULSIs.