An interconnection network for a novel reconfigurable circuit board

This paper presents an interconnection network embedded in a novel reconfigurable circuit board for rapid electronic system prototyping. This system supports high pincount packages and high density system integration requirements. It can be configured to interconnect integrated circuits and other components at near-intra-chip density. This is achieved using a fault-tolerant interconnection network called WaferNet™, supported by a repeated cell-pattern in a large integrated circuit that can scale up to a full wafer. The design has been manufactured on a 1/10,000
^th
of a full 200 mm wafer, by using a standard 0.18µm CMOS technology. Measurements on the test chip on a custom test board validate the defect tolerant interconnection network for different propagation paths and show that it can propagate digital signals at 270 Mbps@3.3V between two different circuit pins with loads of 5pf, as predicted by simulations.