A 300Hz 19b DR capacitive accelerometer based on a versatile front end in a 5th-order ΔΣ loop

This paper presents a 5
^th
-order DeltaSigma capacitive accelerometer. The DeltaSigma loop is implemented in mixed signal, the global 5
^th
-order filter having a 2
^nd
-order analog and a 3
^rd
-order digital part. The system can be used with a wide range of sensors, because the mixed-signal front end is programmable. The ASIC developed comprises a voltage-mode preamplifier, two parallel demodulators implementing CDS, and a 7-bit Flash ADC. The latter drives a 3
^rd
-order digital filter, which can be configured for different sensor parameters in order to ensure overall loop stability and optimize the noise performance. With a low-noise MEMS sensor, the system achieves a 19-bit DR and a 16-bit SNR, both over a 300 Hz bandwidth.