Effect of source/drain asymmetry on the performance of Z-RAM® devices

In this paper, the performance of Zero capacitor RAM (Z-RAM
_reg
) devices, developed in a 45 nm SOI CMOS technology, is compared with both symmetric and asymmetric doping schemes. It is shown that the asymmetrically doped Z-RAM (AD) devices offer much better memory performance compared to the symmetrically doped Z-RAM (SD) devices.