A reconfigurable optical bus structure for shared memory multiprocessors with improved performance

A shared bus can provide only limited bandwidth, a fact that limits its usability. We propose a methodology to reuse part of the bandwidth available from temporal and spectral bandwidth expansion with none or minimum buffering delay, resulting in significant performance improvement in both the effective throughput and response time (communication latency) of a slotted bus. The proposed method entails the design and analysis of a reconfigurable bus structure with both temporal and spectral bandwidth expansion and a polynomial time algorithm for optimal configurations for given traffic conditions. We have compared the performance of our reconfigured bus with that of the traditional slotted bus for uniform and localized traffic pattern and found that the reconfigured bus outperforms the traditional slotted bus substantially in many practical scenarios.