Impact of package parasitics on the EMC performance of smart power SoCs

The paper deals with the propagation of EMI in Smart Power SoCs through high frequency parasitic paths, i.e. silicon substrate, and it focuses on the interaction between on-chip parasitic capacitors and package parasitic elements, that negatively affects IC electromagnetic emission. The paper highlights such unwanted parasitic effects through computer simulations and experimental test results. Finally, a new grounding scheme to improve the EMC performance of such integrated circuits is presented.