Model for trap-assisted electron tunneling in thin insulators

Trap-assisted charge transport has been under study for long time in connection with a wide range of problems in microelectronics: the influence on the operation of MNOS memory transistors [1], the capacity enhancement of electrically programmable read-only memories (EPROMs) [2], or reliability issues of insulators with high dielectric constant [3]. More recently, charge trapping has been suspected to degrade the properties of InGaN/GaN light-emitting diodes (LEDs), especially at high local temperatures produced by heat dissipation [4]. However, the problem of the trap-assisted tunneling in LED has been addressed mainly at the qualitative level. Relatively few quantitative analyses are reported in the literature [5,6], of which none deals with the behavior of this phenomenon at high temperatures. Our study aims to fill this gap by introducing a quantitative model of electronic trap in a dielectric environment.