A linearization technique for CMOS RF power amplifier with programmable output

A novel linearization technique for CMOS Class AB power amplifiers (PAs) is presented. The presented technique cancels third-order inter-modulation (IMD3) products of the output power which can be achieved by canceling the negative peak and the positive peak of second-order derivative of g
_m
of the main transistor. Using auxiliary transistors in parallel can effectively flatten second-order derivative of g
_m
while little power is consumed. A Class AB power amplifier incorporating this technique is designed at 433 MHz with programmable output power level. A two-tone test with frequency spacing of 1 MHz has been simulated and the reduction of the IMD3 is at least 10 dB.