A reliable profiled lightly doped drain (PLD) cell for high-density submicrometer EPROM's and flash EEPROM's

A cell with a profiled lightly doped drain (PLD) structure is proposed for realizing high-density nonvolatile memories in the submicrometer range. The PLD cell has a surface n/sup -/ layer with a diffusion self-aligned (DSA) boron layer, in addition to a deep phosphorus n/sup -/ layer. This structure enhances hot-electron generation during write and significantly reduces it during read. The cell exhibits improved data retention as a result of reduced band-to-band tunneling leakage current. The optimized PLD cell combines improved soft-write immunity with high read current, and low gate-induced breakdown leakage with high-speed writing. Simulation results and measurements on a fabricated test structure confirm these characteristics.<
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