Improvement of gate oxide reliability with O2 gas ash process in post poly resist strip and spacer etch asher process in 45nm CMOS technology

With advancement in technology node of silicon CMOS FEOL (Front-end-of-line) process, gate oxide quality is vital to address gate oxide reliability issues. Introduction of O
2
gas Ash process to remove photo resist after poly etch and polymer after spacer etch process was found to be very distinctive and advantageous to improve reliability as well as within wafer uniformity of GOX (gate oxide) especially at poly edge corners, compared to H
2
+N
2
gas ash process. The impact of O
2
-gas ash process on the gate oxide integrity (GOI) of nMOSFET poly edge intensive structures and negative bias temperature instability (NBTI) in pMOSFET with Plasma nitride SiON gate oxide were investigated. On- the-fly measurement technique was used to characterize the effect of NBTI. O
2
-gas asher process illustrates enhanced GOI performance in terms of better breakdown voltage(Vbd) distribution and improved NBTI in terms of saturation drain current degradation (ΔIdsat) and spread (RSQ).