A test machine for digital VLSI circuits fabricated through MOSIS. [Student project]

The design, construction, and operation of a PC based test machine is described which is used to test digital VLSI devices fabricated through MOSIS. This test machine is capable of detecting gate and transistor level, single and multiple stuck-at faults. The test machine was developed as a senior design project in electrical engineering to provide students with experience in team based design of complete systems as well as the fundamental concepts of manufacture testing and diagnosis of VLSI and digital systems.