A low-voltage low-power successive approximation reconfigurable ADC based on SC techniques

This paper presents a 12-bit low-voltage low-power analog-to-digital converter (ADC). The design employs switched capacitor (SC) techniques and implements a successive approximation (SA) algorithm. The ADC is highly reconfigurable, with digitally selectable resolution and input signal amplitude, and achieves 11.4-bit of effective resolution at 500 kHz clock frequency, with a power consumption below 3 ¿W from a 1 V voltage supply.