Semi-custom ASIC technology trends

Some of the high level trends in semi-custom (standard cell and gate array) ASIC technology are identified. Development of ASIC technologies has accelerated to a point where the rate of introduction of new technologies exceeds that of DRAM technology. Implications for process performance, packing density, and cost are discussed. A simple algorithm to model ASIC cost is presented and used to estimate gate and pin counts for optimum costs.