Optimization of the channel lateral strain profile for improved performance of multi-gate MOSFETs

We report for the first time the optimization of the channel lateral strain profile as a new technological booster for improved performance of multi-gate n-channel MOSFET. We find that quasi-uniform or flat-Gaussian-close-to-the-drain profiles are optimum for the I
_on
boosting of sub-50 nm scaled MOSFETs, while the penalty on I
_off
and subthreshold slope is minimum. The reported predictions use realistic lateral uniaxial strain profiles, with peaks up to few GPa's and average values of hundreds of MPa's.