Wire width optimization of transmission lines for low power design

With potentially denser and larger circuits for the emerging multi-chip module technologies, the problem of signal integrity and power dissipation is of paramount importance. This paper addresses the issue of low-power design of MCM interconnects in conjunction with the problem of signal integrity. A termination strategy is presented that uses width optimization of interconnects to size drivers and interconnects on MCM's such that signal quality is preserved, delay constraints are met, and a low-power design is achieved. The optimization algorithm accounts for the nonlinear effect of drivers via a linearized model to facilitate an efficient transmission line synthesis. Further, it is demonstrated that the low-power design algorithm converges to a globally optimal solution.