The architecture and test structures of the XC8100 FPGA family

The XC8100 FPGA family is based on a new metal-to-metal antifuse technology and a "sea-of-gates" type architecture. Programmable interconnect elements are stacked vertically between metal layers and above the fine-grained logic cells, resulting in small die sizes and low cost. The basic cell is designed specifically for technology-independent design. Each cell can be configured to implement combinatorial, sequential, or three-state buffering functions. Other architectural features include a flexible set of high-drive buffers, output slew rate controls, and PCI-compatible I/O structures. A patented programming and test structure addresses the problem of providing for 100% post-program verification without test vectors.