A high level approach to design and implementation of real time low-level image processing operators

This work describes a high level approach to design and hardware implementation of real time low level image processing (LLIP) operators. A description formalism is defined which is based on a modeling of LLIP applications on algorithmic, architectural and technological design levels. A library of LLIP primitives "premanufactured" using Xilinx FPGA (Field Programmable Gate Array) technology and a reference architectural model allows the user to design and to implement specific systems to real time applications.