A 30-V P-channel trench gated DMOSFET with 900 /spl mu//spl Omega/-cm/sup 2/ specific on-resistance at 2.7 V

A scaled-oxide low-threshold P-channel trench gated DMOS employing a 12 Mcell/in/sup 2/. (2 Mcell/cm/sup 2/) closed-cell design, 8-V gate rating and 30-V drain rating is described. Measured specific resistances of 900 /spl mu//spl Omega/-cm/sup 2/ at V/sub G/S=2.7 V and 700 /spl mu//spl Omega/-cm/sup 2/. At V/sub GS/=4.5 V represent the lowest R/sub DSA/ values ever reported for a P-channel DMOS with a 37-V breakdown. The benefit of a 3X scaling of gate oxide thickness is shown by measurement, analytical and numerical modeling to produce a 1.6-V reduction in threshold, a 75% reduction in channel resistance and a 45% reduction in overall trench DMOS on-resistance at V/sub GS/=4.5 V. High density 30-V planar DMOS die resistance is shown to be 3.7X that of the scaled-oxide trench DMOS at V/sub GS/=4.5 V.