Development of a novel Wafer-Level-Packaging technology using laminating process

We have been developing a novel Wafer Level Packaging technology which has a possibility of lowering WLP cost drastically by applying some Jisso techniques to WLP manufacturing processes. In short, our idea is laminating a Cu wafer having Cu bumps to a Si wafer in which LSIs are formed with a nonconductive thermosetting resin. The process flow of the developed WLP technology is as follows; 1. Cu bump formation by wet etching of a Cu wafer (same shape with a Si wafer) 2. Ni/Au plating both on top of the Cu bumps and Al electrodes on Si wafer 3. NCF (Non Conductive Film) laminating to a bump side of the Cu wafer 4. Laminating (thermo compression bonding) of Cu and Si wafer after alignment 5. Re-distribution layer (RDL) formation by wet etching of the Cu wafer laminated with the Si wafer 6. PSR laminating, solder ball mounting, and dicing In this development, reducing wafer warpage after thermo compression bonding, reducing misalignment between the Cu bumps on the Cu wafer and the Al electrodes on the Si wafer generated during the laminating process, and achieving a good ohmic and highly reliable connection of the bump and the electrode are the biggest issues. As for the wafer warpage, we developed double sided laminating structure and process which enables to cancel the wafer warpage because of balancing thermal stress of both sides of Si wafer. The misalignment caused by the difference of the thermal expansion coefficient of Cu and Si was effectively reduced with an offset bump formation method conducted at lithography process, and the misalignment occurred during the laminating process was also reduced by improving handling of thin Cu wafer. As a result, the misalignment could be suppressed under 20 um and the fine pitch (<100 um) connection was achieved. In addition, excellent electrical properties (ohmic contact and high yield within a wafer) and reliability were realized by employing the Au-Au thermo compression bonding method which is enabled with Ni/Au electroless plating on the Al electrodes of the LSI and also on the top surface of the Cu bumps. Moreover, we developed a technique of removing the NCF on top of Cu bumps before thermo compression bonding because of avoiding a residual NCF existence at the interface of Au-Au connections. In this work, we evaluated two kinds of methods for removing NCF, plasma etching and improving NCF laminating conditions.