Effect of rapid epitaxy in in situ phosphorus-doped polysilicon emitter on current-gain of bipolar transistors

The effect of rapid solid-phase epitaxy (SPE) on the current gain of in situ phosphorus-doped polysilicon-emitter (IDP) transistors has been evaluated, IDP technology is used to produce very-high-speed small-emitter bipolar transistors, which have very high current gain due to their hetero-emitter-like characteristics. The IDP film is deposited on a clean poly/mono-silicon surface, followed by rapid thermal annealing (RTA). The poly/mono interface was analyzed and the lattice image was observed by high-resolution transmission electron microscopy (TEM). The majority of the IDP transistors had poly/mono-silicon interfacial hetero-emitter-like characteristics and thus had high current gain. The remaining transistors, however, did not exhibit hetero-emitter-like characteristics due to SPE and thus the current gain was reduced. These results are well explained using an interfacial residual-stress model: rapid epitaxy occurs when the amorphous silicon film is annealed by RTA, which eliminates the interfacial residual stress and in turn the hetero-emitter-like characteristics.