Post-radiation memory correction using differential subtraction for PHENIX

In colliders such as RHIC, the radiation levels are well below those of colliders such as LHC. The problem is that there can be enough radiation at the inner detector (Multiplicity-Vertex Detector or MVD) to significantly affect a low-priced, non-radiation-hard CMOS process. If the radiation affects the entire analog memory unit (AMU) in a uniform fashion, then a real-time correction should be able to be performed to correct any changes seen in the memory as well as the induced correlated noise from detector pickup, thus precluding the need for a more expensive rad-hard process. This paper will present testing on memories fabricated in a "soft" process and exposed to ionizing radiation. We used a single pipeline as a reference to be subtracted in a cell-by-cell basis from each pipe during read out and investigated the spatial effects of using different pipes for the reference. Use of this method reduced the noise which was common to all pipes (common-mode noise) and thus reduced both common-mode input noise and pattern noise generated from address lines being exercised on the AMU. The correlation across the memories (6-, 8-, and 16-channel AMUs fabricated in the Orbit 1.2 /spl mu/ CMOS process) vs. radiation dose was found to be on the order of 10 bits. Both pre- and post-radiation results are presented on systems designed for PHENIX and WA98 at CERN as well as measured results on the minimization of the effects of injected systematic noise.