VSPTIDR: A Novel Code for Test Compression of SoC

The bandwidth between automatic test equipment (ATE) and circuit under test is a bottleneck in the integrated circuit (IC) test. To reduce IC test time and cost, a novel variable shifting prefix-tail ID reverse (VSPTIDR) code for test stimulus data compression is designed in this paper. The coding rules and decoder are presented in detail. While the probability of Os in the test set is greater than 0.92, better compression ratio that acquire by VSPTIDR code contrasting with FDR code can be proved by theoretical analysis and experiments. And the on-chip area overhead of VSPTIDR decoder is about 15.75% less than FDR decoder.