A Reliability Circuit Implementation for VLSI with Combined Huffman and CRC Coding

The Cyclic Redundancy Checking (CRC) is widely used in many fields. The error undetected probability of the CRC relies on the length of a CRC code. For a certain format of the code, the error undetected probability is nearly a constant. But more bits of the information take more chances to burst an error. This paper proposes to reduce the error burst probability with an application of the compression theory, Huffman coding. Consequently, more reliable circuits using the CRC coding can be implemented. And a new reliability circuit for VLSI is designed in this paper.