Modeling and Experimental Measurement of Active Substrate-Noise Suppression in Mixed-Signal 0.18-$\mu\hbox{m}$ BiCMOS Technology

Simulation and experimental results are presented for an active-noise-suppression technique to reduce substrate crosstalk in mixed-signal IC technology. The method utilizes a 3-D distributed resistive-capacitive substrate model, along with a BiCMOS wideband differential noise suppression amplifier (NSA) designed in IBM's 0.18-mum 7WL BiCMOS technology. Simulation results for a GR-defined ldquoquietrdquo region predict a noise suppression factor of -6 dB over a frequency range of 10 MHz-2 GHz at the center of the region with a peak suppression of -14 dB at the point of the NSA connection to the guard ring (GR). BF-Moat and P
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region/deep trench/n-well GR isolation structures were also integrated into the 3-D substrate model, for investigation of their isolation ability. The simulated substrate-noise suppression and isolation results were verified with an experimental test site, designed and fabricated in 7WL technology. Measurements of both noise suppression and isolation factors were compared to the simulation results and to predictions derived from an analytical model.