A versatile structure for on-chip extraction of resistance matching properties

This paper describes a simple test structure to accurately characterize resistance mismatch. The process engineer would use this structure to monitor process variations with respect to contact resistance, spreading resistance, sheet resistance and encroachment, the circuit designer would use the structure to determine the matching properties of the line and how to optimize a resistor layout for matching given a maximum physical size. By direct measurements on the structure, the user will know how well resistors can be matched, and what factors introduce the dominant components of the mismatch.