Using low-k oxide for reduction of leakage current in Double Gate Tunnel FET

In order to enhance I
_on
/I
_off
ratio in the double gate tunneling field effect transistor (DG-TFET), employing a double gate structure has been investigated. Furthermore by employing a low-k oxide for the gate near the drain side (Gate2) fringing field effects are suppressed. Hence, the leakage current is decreased. Also a work function engineering method has been employed for the gate near the source (Gate1) to further reduce the off state current.