Analysis and Optimization of Packaging Structures to Maximize the Thermal Performance of Multi-Finger GaInP/GaAs Collector-Up HBTs

We develop an elaborate finite-element model to analyze packaging structures of multi-finger GalnP/GaAs collector-up HBTs. Novel packaging structures have been designed and evaluated in detail. With careful optimization, the thermal performance can be maximized and the conventional heat-dissipation configuration can be further reduced by 40%. The results demonstrate that thinning the packaging design underneath the GalnP/GaAs collector-up HBT should be feasible for miniaturizing HBT-based high-power-amplifier applications.