Evaluation of Packaging-Induced Performance Change for Small-Scale Analog IC

The impact of packaging-induced circuit performance changes for a small-scale integrated circuit (IC) smaller than 1.0 mm
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has been evaluated by a new method with specially designed test chips. Analog circuits such as power management ICs for portable electronic devices are small-scale chips and require high-accuracy operation. Multiple test chips with different resistor locations have been fabricated and measured by die-to-die correspondence, after which one distribution chart was reproduced from all of the measurement results. The present method enables the characteristic distribution on the chip surface to visualize not only the electrical parametric distribution but also the residual stress distribution, even though small-scale ICs have a limited number of bonding pads. In addition, a new method for evaluating the circuit performance change of an analog circuit due to stress-induced parametric changes is presented.