Rosetta: Standardization at the System Level

System-level design has become the rage in the electronics world, with systems-on-chip (SoCs) becoming routine, the electronic system level appearing in design flows, and various system-level design notations becoming common. Unfortunately, where the system level exactly begins and what it encompasses remains a matter of ongoing debate. The late 1990s saw the efforts emerge to actively support the system level in electronic system design. Several languages and approaches emerged and flourished, including SystemC, SystemVerilog, VHDL 2008, SysML, and Rosetta. The paper discussed that by evaluating language constructs and their usage, Rosetta can provide insight into system-level design.