A complex BPF with on chip auto-tuning architecture for wireless receivers

A 3^rd order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18um standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3rd order harmonic input intercept point (IIP3) is larger than 16.2dBm, with 50Ω as the source impedance. The input referred noise is about 80uV_rms. The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28x0.22mm², less than 1/8 of that of the main-filter which is 0.92x0.59mm². After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.