Yield analysis methods in 65nm technology Development

For the new technology development, normal yield improvement methods useful to production are not enough. In the early phases, without yield signature, many systematic issues can not be captured by WAT or inline defect inspections. We need to create new analysis methods based on the technology development different phases. At the same time, multiple issues usually mix together and are not easy to be distinguished. So the selection of test chips, EFA (Electrical Failure Analysis), PFA (Physical Failure Analysis) and DFA (Data Failure Analysis) methods become more important. This paper mainly focuses on the yield improvement methodologies in 65nm three phases at foundry.