Wafer-scale processing of aligned carbon nanotubes for future integrated circuits

We demonstrated essential technological components for wafer-scale integrated CMOS nanotube circuits such as inverters, NAND, and NOR logic gates: 1.The full-wafer-scale synthesis and transfer of massively aligned carbon nanotubes, and device fabrication on 4 inch substrates 2. In-depth device study and tuning, and extensive doping study for the first wafer-scale integrated CMOS nanotube circuits. 3. A novel device structure such as defect-tolerate logic gate.