Thermal stability of a high performance PTGVMOS with native-tie

We demonstrate thermal stability of PTGVMOS (Pseudo Tri-Gate Vertical MOSFET) with native-tie on bulk Si wafer. For comparison three types of structure are designed. According to 2D simulation, our proposed structure show excellent thermal stability, such as the lattice temperature in the drain-on-top configuration and drain-on-bottom configuration were improved 50% and 66.6% respectively. The fabricated devices have excellent on/off current ratio (61900,000 times at gate length 40nm) in the drain-on-bottom configuration. In addition, the devices overcome short-channel effects and self heating effects significantly.