A Full TCAD simulation and 3D parasitic capacitances extraction in 90nm NAND flash memories

In this paper we propose a way to study the degradation mechanism of ¿inhibited¿ cells during the cycling of ¿selected¿ cells in 90 nm NAND Flash memories. This degradation is a main issue in NAND Flash memories reliability. To explain this degradation, we first develop a 2D TCAD cell simulation to watch attentively what happens in the channel where measurements are impossible. Some phenomena are shown here which could begin to explain what occurs. Because of continual shrinking, coupling capacitances between cells in the array have a significant impact on the cell behaviour. The previous simulation can be completed by taking into account these 3D parasitic capacitances which have been extracted in a second time.