Fast VLSI implementations for MRF and ANN applications

A VLSI architecture for real-time Markov random field optimization is presented. This architecture contains a simple and fast hardware module implementing the sigmoid function using look-up tables and piecewise linear interpolation. Error bounds are given for computing with this module, and it is shown that it can also used for improving the performance of a systolic architecture for artificial neural network (ANN) implementations. Simulation results are presented.<
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