High Performance 70-nm Germanium pMOSFETs With Boron LDD Implants

Ge pMOSFETs with gate lengths down to 70 nm are fabricated in a Si-like process flow. Reducing the LDD junction depth from 24 to 21 nm effectively reduces short-channel effects. In addition, a reduced source/drain series resistance is obtained using pure boron LDD implants over BF
₂
, resulting in a significant
I

_ON
boost. Benchmarking shows the potential of Ge to outperform (strained) Si, well into the sub-100-nm regime. The 70-nm devices outperform the ITRS requirements for
I

_ON
by 50%, maintaining similar
I

_OFF
, as measured at the source.