A cost model for partial dynamic reconfiguration

We present a new model for dynamic reconfiguration costs. The model targets both, reconfiguration time and data. Reconfiguration is modeled at the granularity of reconfigurable resources, hence the model can take advantage of the partially identical configurations. We apply the model to binary configuration data to generate cost efficient bitstreams for reconfigurable systems. It is shown how the model relates to previously established reconfiguration techniques. The improvements in reconfiguration time and bitstream size are demonstrated on an example. The model also provides a measure for the similarity of reconfigurable circuits. We present the application of the reconfiguration model for high level designs. The model describes in detail, which circuit elements are static and which need to be reconfigured. We use the model as a cost function in a high level synthesis tool to derive an allocation with minimal reconfiguration costs.