Performance Evaluation of the Memory-Space-Memory Clos Switching Network

This paper considers memory-space-memory (MSM) Clos packet switching networks, and investigates the conditions for it to match an output queueing switch, which is always desirable because of its optimal performance for all traffic patterns. As an MSM Clos network operates at speed about twice the line rates to emulate an OQ switch, which may limit its scalability when the line rates are very high. Then we propose a new method called multiple port memory (MPM) based on the multi-stage multi-layer property of the Clos architecture, which has three merits: (a) without any internal speedup (i.e. operating at line rates); (b) without global information exchange among inputs and outputs of the switch, and thus eliminate the information complexity; (c) with a matching algorithm complexity as low as O(1).