A performance analysis for single-walled metallic Carbon Nanotubes as global and intermediate on-chip interconnects

This paper analyzes several delay estimates for metallic carbon nanotubes (CNT) as interconnects of very large scale integrated (VLSI) chips. A study of the 2005 edition of the international technology roadmap (ITRS) [1] for global/intermediate interconnects is presented to highlight the significant issues encountered with the projected performance of copper/aluminum interconnects till 2020. Then a worst case performance analysis of metallic CNTs is presented and compared versus copper interconnects. It is evaluated that the RC delay of CNTs does not meet the future RC delay requirements of on-chip intermediate and global wires.