FPGA-based implementation of hardware technology on Generic Algorithms

The research on generic algorithms is usually focused on software implement, which is always restricted in terms of high real-time by computer system because it is a serial calculation. This paper introduces a hardware structure on FPGA-based generic algorithms, which programmed by VHDL language. All modules compilation and simulation were performed by Altera Quartussquare 5.0 and were tested on EPIK100QC208-3. The experimental results show that the design achieves the required functions. At the end of this paper, a new idea of paralleled and pipelined hardware structure based on FPGA is presented.