Implementing a cost-effective run-time reconfigurable system for stream applications

In today’s consumer electronics the devices are crossing the boundaries by integrating the variety of functionalities to increase their market shares. As a result, the primary focus of designing consumer electronics lies upon implementation of cost-effective, multi-task and multi-mode operations. We suggest a methodology for a cost-effective implementation of the reconfigurable system based on run-time reconfigurable FPGAs. The methodology focuses on extraction of the architecture that remains static throughout the lifetime of the application. The static architecture is constructed by analyzing the tasks associated with event(s) and distinguishing the level of task that needs to be in hardware. With the given architecture the system maintains inter-communication and only replaces the tasks that are necessary via reconfiguration. The idea of the proposed system is employed on the image processing of an autonomous satellite docking system because of tight physical limitations and high speed requirements. Obtained results prove that the run-time reconfigurable system architecture can provide a very efficient way to mosaic the micro-architecture that reuses limited hardware resources in time.