Advanced junction engineering featuring millisecond annealing with co-implantation for 45 nm node high performance and low standby power CMOS technologies

This paper review our developed junction profile engineering technique that uses millisecond annealing (MSA): MSA is implemented prior to spike- RTA to modulate the junction profile. With this technique, we can improve the performance of MOSFETs more effectively than conventional techniques. In addition, it enables us to use lower MSA temperatures with wide process window because of its low sensitivity to MSA temperatures within a certain range, while the conventional ways require ultra high temperatures to improve the device performance. We applied this technique to 45 nm node low standby power (LSTP) CMOS technology (K. Sukegawa et al., 2007) as well as the high performance technology (T. Yamamoto et al., 2007), and achieved the competitive performance of CMOS devices thanks to the reduction in the source- drain extension (SDE) resistance for pMOSFETs and the effective halo profile formation of nMOSFETs.