Performance Enhancement in Ultra-Scaled SONOS FinFlash by Inclusion of High-k Dielectric in the Gate Stack

This paper presents the technological process and electrical behaviour of SONOS FinFlash devices fabricated on silicon-on-insulator (SOI) substrates and including HfO
₂
in the inter poly dielectric (IPD). Using trimming techniques, ultra-scaled devices were processed with aggressive dimensions down to 10 nm channel width and 30 nm gate length. Good performances are obtained in Fowler-Nordheim (FN) operation on these structures.