1V 10-bit successive approximation ADC for low power biomedical applications

A low power 1 V 10-bit successive approximation analog-to-digital converter (SA-ADC) is presented for biomedical applications. In the DAC capacitor arrays of this SA-ADC a charge-recycling method for switching the capacitors is used. Besides, a 1 V rail-to-rail input comparator with both current driven bulk technique and offset cancellation is proposed. The complete 1 V ADC implemented in TSMC 0.18 um CMOS process has a signal-to-noise ratio of 58.5 dB and its effective number of bits is 9.4 based on post-layout simulations. The entire ADC power consumption is 32.6 uW for normal signals and 29.5 uW for ECG applications.