A Low-Jitter 8-to-10GHz Distributed DLL for Multiple-Phase Clock Generation

A low-jitter distributed DLL for multiple-phase clock generation is proposed. The distributed DLL monitors the phase difference for each output clock and the reference clock. This distributed DLL is fabricated in a 90 nm CMOS process and consumes 15 mW from a 1 V supply excluding output buffers. The distributed DLL operates from 8 to 10 GHz, which is consistent with the simulation results and also the fastest in CMOS technology.