Hot-Electron Capture for CHEI Programming in SONOS-Type Flash Memory Using High- $k$ Trapping Layer

In this paper, electron-energy- and lattice-temperature-dependent hot-electron-capture properties have been investigated for polysilicon–oxide–nitride–oxide–silicon-type Flash memories using a $\hbox{Si}_{3}\hbox{N}_{4}$ and high-dielectric-constant $(k)\ \hbox{ZrO}_{2}/\hbox{HfO}_{2}$ charge trapping layer when channel hot-electron injection is applied for programming. Hot-electron-capture rate is extracted by using an electrical method for various devices, and its lattice-temperature dependence indicates that inelastic phonon scattering may be the dominant mechanism of hot-electron relaxation. Memory device using a $\hbox{ZrO}_{2}$ charge trapping layer shows enhanced electron capture from extended $\hbox{Si}_{x}\hbox{Zr}_{1-x}\hbox{O}_{2}$ interface of $\sim$2 nm due to more sufficient scattering, and the programming speed of $\hbox{ZrO}_{2}$ device is enhanced as compared to $\hbox{HfO}_{2}$ by $\sim$2.2 times and $\hbox{Si}_{3}\hbox{N}_{4}$ by $\sim$3.2 times. Capabilities of low-voltage operation and improved endurance property are also demonstrated for $ \hbox{ZrO}_{2}$ device as compared to the other contending nor -type devices.