Hardware implementation of an Echo-Canceller for DVB-T On-Channel Repeaters

The necessity to obtain a better area coverage for services such as terrestrial digital television (DVB-T) is often obtained by using isofrequency channel repeaters. In this case the repeater receives at the input part of the transmitted signal and consequently an echo canceller is requested. The echo canceller is often based on a loop comprising a complex FIR filter with variable coefficients, that are calculated from the autocorrelation function of the received signal. In this paper, a hardware implementation of an echo-canceller is presented. A board based on a Texas Instruments floating-point DSP and an Altera Cyclone II FPGA has been used for the final prototype.