A Low-Noise UWB CMOS Mixer Using Switched Biasing Technique

This paper presents a low-noise UWB CMOS mixer using switched biasing technique in 0.13-μm RF CMOS process. Design of the proposed mixer is based on the conventional Gilbert-type structure and utilizes switched biasing technique for a current source. As a flicker noise of the tail transistor is lowered by using switched biasing, the noise figure of the mixer output translated to baseband is improved as well. Calculated results show a conversion gain of 2 - 14.3 dB and a DSB noise figure of 8.43 - 14 dB in overall UWB band. In addition, the mixer performs IIP
3
of -3 dBm with a power dissipation of 5.57 mW from 1.2-V supply. The size of the chip is 0.72 mm × 0.72 mm.